Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus on Design...-for-Test. You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive DFT...
With You will be in the Silicon One development organization as an ASIC Implementation Technical Lead in San Jose, CA with a primary focus... groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire...
Senior Custom ASIC Engineering Lead Are you a versatile, senior engineer capable of leading external and internal... cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips...
Senior Custom ASIC Engineering Lead Are you a versatile, senior engineer capable of leading external and internal... cross-functional teams in areas such as physical design, STA, DFT, and packaging? Have you taped out so many chips...
verification, PD, DFT, Package and SW teams to develop next generation AI Switching ASIC. Perform diagnostic and post silicon... failures. Minimum Qualifications: Bachelor's degree in Electrical or Computer engineering and 12+ years of ASIC Design...
Science, Electrical or Computer Engineering At least 10+ years hands-on experience in ASIC design and CAD/EDA tool/flow... Familiarity with ASIC design process including RTL, synthesis, logic equivalence, DFT, and backend related methodology and tools...
: Experience successfully leading small to medium size digital design mixed signal IP engineering teams. Able to lead a team... and leading engineering teams Proven ability to lead successful digital or mixed signal IP developments to high volume production...