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Keywords: Chip-Level Design Verification Engineer, Location: San Diego, CA

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ASIC Design Verification Engineer (Security Group)

requirements. As a Design Verification Engineer, you will work with Chip Architects to validate the concepts of core and sub... digital transformation to help create a smarter, connected future for all. As a Qualcomm Design Verification Hardware Engineer...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 08 Oct 2025

Staff/ Sr. Staff Design Verification Engineer - QGOV

skills & experience with assertion & coverage-based verification methodology Good understanding of chip-level functional... Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop verification...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Oct 2025

Senior Design Verification Engineer - QGOV

skills & experience with assertion & coverage-based verification methodology Good understanding of chip-level functional... Summary: Role: Familiarity with RTL design in Verilog and System Verilog Develop verification methodology, ensuring...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 18 Oct 2025
Salary: $115600 - 173400 per year

Principal Design Verification Engineer - QGOV

skills & experience with assertion & coverage-based verification methodology Good understanding of chip-level functional... Summary: Design Verification Role: Familiarity with RTL design in Verilog and System Verilog Develop verification...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 17 Oct 2025

Sr. ASIC Design Verification Engineer, Project Kuiper

formal verification of complex blocks to ensure functional correctness · Work with the design and communication systems team... and participate in system level verification using test benches constructed using UVM, System C and DPI-C · Develop a highly...

Company: Amazon
Location: San Diego, CA
Posted Date: 14 Sep 2025

SOC Verification Engineer

, Emulation, Design Verification, Test and Validation, and FW/SW engineering. As a SOC Verification Engineer..., industry-standard low power architecture, and build block / chip level testbench using best-in-class verification methodology...

Company: Apple
Location: San Diego, CA
Posted Date: 08 Oct 2025

Sr. Verification Engineer - Mixed-Signal ICs

. Integrated Circuit (IC) Verification Engineer is responsible for developing and implementing verification plans for a variety... of mixed-signal integrated circuit blocks and systems. The Sr. Integrated Circuit (IC) Verification Engineer will closely...

Company: Semtech
Location: San Diego, CA
Posted Date: 02 Oct 2025
Salary: $130000 - 183206 per year

SOC Verification and Methodology Engineer

verification tests to identify and resolve design issues. In this role of Design Verification Engineer, you will be using advanced... state of the art tools, verification techniques and methodologies to verify varied design IPs in addition to system-level...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 04 Sep 2025

GPU Validation and Emulation Engineer (Multiple Levels Available)

& design verification. Support chip bring up and post silicon debug. Debug functional and timing models. Preferred... bringup, digital design, verification, debugging, and waveform viewers 1+ Hardware emulators, such as Palladium, ZeBu, Veloce...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 23 Aug 2025

HW SOC/ASIC Physical Design Engineer, Principal

full-chip and block-level physical verification including DRC, LVS, ERC, antenna, and density checks using industry... for all aspects of the process flow from high-level design to synthesis, place and route, timing and power use, and verification...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 19 Oct 2025

HW SOC/ASIC Physical Design Engineer, Staff/Sr Staff

full-chip and block-level physical verification including DRC, LVS, ERC, antenna, and density checks using industry... Summary: We are seeking a highly skilled and motivated Physical Design Engineer to join our team. The ideal candidate...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 19 Oct 2025

HW SOC/ASIC Physical Design Engineer, Senior

automation. Execute full-chip and block-level physical verification including DRC, LVS, ERC, antenna, and density checks using... of process flow from high-level design to synthesis, place and route, timing and power use, and verification or similarly...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 19 Oct 2025
Salary: $115600 - 173400 per year

Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer

your designs and also provide debug support when integrated into the rest of the chip. Synthesis, Timing Closure, Physical Design... experience Preferred Qualifications 5-10 years of ASIC design (RTL coding) Preferred Exposure to RTL Design Verification...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 09 Oct 2025

Senior Physical Design Engineer – Place & Route (PnR) - Remote

- and chip-level physical design in Cadence Innovus for GF 22nm. Leads floorplanning, power grid design, placement, CTS, routing...: U.S. Citizens or Green Card holders. Senior Physical Design Engineer – Place & Route (PnR) Description: Owns and drives block...

Company: Encore Semi
Location: San Diego, CA
Posted Date: 04 Oct 2025
Salary: $140000 - 160000 per year

Senior Physical Design Engineer - Place & Route (PnR) - Remote

- and chip-level physical design in Cadence Innovus for GF 22nm. Leads floorplanning, power grid design, placement, CTS, routing...: U.S. Citizens or Green Card holders. Senior Physical Design Engineer - Place & Route (PnR) Description: Owns and drives block...

Company: Encore Semi
Location: San Diego, CA
Posted Date: 04 Oct 2025
Salary: $140000 - 160000 per year

Sr. Embedded Firmware Design Engineer - Mixed-Signal ICs

. Embedded Firmware Design Engineer is responsible for designing, developing and validating a variety of firmware-based systems... and functions. Ahead of detailed design, the Sr. Embedded Firmware Design Engineer will actively participate in the definition...

Company: Semtech
Location: San Diego, CA
Posted Date: 01 Oct 2025
Salary: $130000 - 183206 per year

Sr. Digital IC Design Engineer

. Digital Integrated Circuit (IC) Design Engineer is responsible for designing, developing and validating a variety of digital... integrated circuit blocks and systems. Ahead of detailed design, the Sr. Digital IC Design Engineer will actively participate...

Company: Semtech
Location: San Diego, CA
Posted Date: 28 Sep 2025
Salary: $120000 - 183000 per year

Design Methodology Engineer

Summary: Qualcomm's Design Technology team is seeking a motivated engineer to drive development of advanced methodologies... in die-level IR drop, STA, and power. The engineer should be proficient in static timing analysis using the Synopsys Primetime...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 20 Sep 2025

ASIC Modem Design Engineer, Project Kuiper

at Amazon! We're hiring a Modem Design Engineer within a high performance ASIC design team. This team is using industry... specification to RTL to optimizing timing / power to chip level validation. · Develop solutions optimizing customer experience...

Company: Amazon
Location: San Diego, CA
Posted Date: 13 Sep 2025

Lead Graphics Design Engineer, Shader Core

_ THE ROLE: The AMD GPU team is looking for inquisitive, motivated Lead Graphics Design Engineer, Shader Core... engineers, verification engineers, and physical design engineers teams to accomplish your tasks THE PERSON...

Posted Date: 12 Sep 2025