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Keywords: Design Verification (DV) Engineer, Location: Austin, TX

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Design Verification (DV) Engineer

performance verification. We are looking for experienced Design Verification (DV) engineers who are skilled at writing testbenches... and building verification environments to exercise complex HDL. Our ideal candidate is not only an ace tester, but a practicing...

Location: Austin, TX
Posted Date: 24 Jan 2025

Cellular SOC Design Verification Engineer

Verification Engineer on our team, you'll be at the center of the verification effort within our silicon design group responsible... of a large scale SOC design, Complex verification test benches, different types of SOC architectures, multiple high speed...

Company: Apple
Location: Austin, TX
Posted Date: 10 Jan 2025

ASIC Engineer, Design Verification

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. As a Design Verification... towards creating a first-pass silicon success. ASIC Engineer, Design Verification Responsibilities Develop functional tests based...

Company: Meta
Posted Date: 09 Jan 2025

Design Verification Engineer

for all features under your care. Execute verification plans, including design bring-up, DV environment bring-up, regression enabling... verification engineer. As a member of our dynamic group, you will have the rare and rewarding opportunity to craft upcoming...

Company: Apple
Location: Austin, TX
Posted Date: 11 Dec 2024

Design Verification Methodology Engineer - (UVM/SV)

covering design technology, functional verification technology, coverage, debug, low power technology, and automation... methodologies in the hardware design verification space. The following is a list of key responsibilities that the candidate...

Location: Austin, TX
Posted Date: 23 Jan 2025

Design Verification Engineer

to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple... team you will be at the heart of the chip design effort collaborating with all subject areas (vertical product model...

Company: Apple
Location: Austin, TX
Posted Date: 15 Nov 2024

Design Verification Engineer

to our job and when you are a part of that team there's no telling what you could accomplish. Design Verification Engineers at Apple... team you will be at the heart of the chip design effort collaborating with all fields (vertical product model). You own...

Company: Apple
Location: Austin, TX
Posted Date: 15 Nov 2024

Graphics (GPU) Design Verification Engineer

with other DV teams - Create and maintain UVM-based verification test bench components and environments - Create and maintain Object... Minimum Qualifications Minimum Qualifications BS + 3 years of relevant Design Verification experience Background in CPU or GPU...

Company: Apple
Location: Austin, TX
Posted Date: 01 Nov 2024

ASIC Implementation Engineer - Static Verification

, RDC,). Work closely with the Design Engineers, DV Engineers, Emulation Engineers in supporting them with the handoff..., synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer - Static...

Company: Meta
Posted Date: 24 Jan 2025

SoC DFT DV Engineer

engineer to join our exciting team of problem solvers. Description Description In this highly transparent and interactive... role, your primary responsibilities will include: - Reviewing Architecture and Design Specifications. - Extracting design...

Company: Apple
Location: Austin, TX
Posted Date: 08 Jan 2025

SoC DFT DV Engineer

engineer to join our exciting team of problem solvers. Description Description In this highly transparent and interactive... role, your primary responsibilities will include: - Reviewing Architecture and Design Specifications. - Extracting design...

Company: Apple
Location: Austin, TX
Posted Date: 08 Jan 2025

IC Package Design Engineer

and configuration optimization. You will be responsible for Package/SIP/module physical design and layout, optimization, DV and tape out.... - Define and develop design verification and automation strategy to strengthen and streamline package design as well as release...

Company: Apple
Location: Austin, TX
Posted Date: 13 Nov 2024

IC Package Design Engineer

and configuration optimization. You will be responsible for Package/SIP/module physical design and layout, optimization, DV and tape out.... - Define and develop design verification and automation strategy to strengthen and streamline package design as well as release...

Company: Apple
Location: Austin, TX
Posted Date: 13 Nov 2024

Principal Application Engineer – System VIP

. As an integral member of the North America Verification Field Applications Engineering (AE) Team, you will work directly... with industry leading semiconductor and system companies to deploy Cadence’s market leading verification platforms including cutting...

Location: Austin, TX
Posted Date: 24 Jan 2025

ASIC Implementation Engineer - Synthesis

and Methodology for all FE-tools including (Lint, CDC, RDC, Synthesis, STA, Power). Work closely with the Design Engineers, DV..., synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Implementation Engineer...

Company: Meta
Posted Date: 24 Jan 2025

Mixed-Signal Behavioral Modeling Engineer

, while also incorporating non-idealities. You will collaborate with circuit design teams to understand details of custom circuits, and with DV... hardworking Mixed-Signal Behavioral Modeling Engineer. As a member of our dynamic group, you will have the unique and rewarding...

Company: Apple
Location: Austin, TX
Posted Date: 05 Dec 2024

Mixed-Signal Behavioral Modeling Engineer

hardworking Mixed-signal Behavioral Modeling Engineer. If you are early in your journey towards a chip design career and wish... and design verification. You will gain expertise in simulation, software methods, optimization and analysis that is increasingly...

Company: Apple
Location: Austin, TX
Posted Date: 05 Dec 2024