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Keywords: Formal Verification Lead, Location: Bangalore, Karnataka

Page: 2

Digital Engineering Manager

across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal... verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus...

Posted Date: 04 Feb 2025

Digital Engineering Manager

across multiple clock domains seamlessly and in a glitch free manner. Should be able to lead/collaborate for Logic Synthesis, Formal... verification, Power estimation and STA. Should have experience of OTP, MTP, Efuse read/writes, controller design and data bus...

Posted Date: 04 Feb 2025

Technical Analyst

. Represent system in the event of an audit (internal or external), provide formal responses and ensure implementation.... Create, Review, and execute test cases. Oversee release management including change control tracking and verification...

Posted Date: 02 Feb 2025

Technical Analyst

. Represent system in the event of an audit (internal or external), provide formal responses and ensure implementation.... Create, Review, and execute test cases. Oversee release management including change control tracking and verification...

Posted Date: 02 Feb 2025

Senior Engineer - Analysis

Engineering. Candidate shall support independently all FE calculations and verification of aero-engine components. The execution... and lead product improvements activities, method development and continuous improvement activities through various internal...

Company: GKN Aerospace
Posted Date: 25 Jan 2025

Product Engineer (Synthesis)

, DFT, Formal Verification, Logic Equivalence Checks Hands-on experience using commercial synthesis tools like Synopsys-DC... Lead a Team of Engineers working on solving the latest design challenged in Logic Synthesis Collaborate with RnD and drive...

Company: Siemens
Posted Date: 23 Jan 2025

Member of Consulting Staff

in RTL synthesis tool development. Knowledge of Verilog, VHDL, and formal verification. Expertise in RTL and gate-level.... ⁠Ability to guide and lead others, towards project completion. Desirable: We are looking for an individual with previous experience...

Company: Siemens
Posted Date: 23 Jan 2025

Member of Consulting Staff

in RTL synthesis tool development. Knowledge of Verilog, VHDL, and formal verification. Expertise in RTL and gate-level.... ⁠Ability to guide and lead others, towards project completion. Desirable: We are looking for an individual with previous experience...

Company: Siemens
Posted Date: 23 Jan 2025

ASC End to End Integrated Process Principal Architect

and influencing skills Ability to solution, estimate and lead the implementation of cross-products / solutions across standard 'mega...-oriented mindset. A good measure of your success will be to be invited to lead discussions on flagship customer cases precisely...

Company: SAP
Posted Date: 25 Dec 2024

ASC End to End Integrated Process Principal Architect

and influencing skills Ability to solution, estimate and lead the implementation of cross-products / solutions across standard ‘mega...-oriented mindset. A good measure of your success will be to be invited to lead discussions on flagship customer cases precisely...

Company: SAP
Posted Date: 24 Dec 2024

ASIC RTL Design Engineer (Camera) - Sr Staff Engineer/Manager

Experience in Tools like Spyglass Lint/CDC checks and waiver creation Experience in formal verification with Cadence LEC... Engineering General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing...

Company: Qualcomm
Posted Date: 22 Dec 2024

ASIC RTL Design Engineer(Camera) - Staff Engineer

Experience in formal verification with Cadence LEC Experience in mobile Multimedia/Camera design is a plus DSP /ISP knowledge... Engineering General Summary: Job Function : Camera Design Lead/Staff Candidate will be responsible for design/developing...

Company: Qualcomm
Posted Date: 22 Dec 2024

ASIC Design Engineer| 4 to 6 years

in implementation: specification, design, verification, formal verification, system testing. Validated experience in physical design... is helpful. RTL development and verification (VCS, System Verilog, UVM/OVM, Formal verification) Experienced in system debug...

Company: Cisco Systems
Posted Date: 19 Dec 2024