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Keywords: IP Physical design engineer, Location: Bangalore, Karnataka

Page: 2

IP Verification Engineer (MTS)

_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion...

Posted Date: 10 Jan 2025

Lead Design Engineer

with Physical Design teams in multiple successful ASIC/IP tapeouts. Strong ability on RTL debug , and logic development.... Knowledge of the IP/SoC level timing closure flow and methodology. Strong command of synthesis, STA, design for test...

Posted Date: 22 Dec 2024

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... of Server SOC and is responsible for delivering the physical design of tiles to meet challenging goals for frequency, power...

Posted Date: 17 Jan 2025

SMTS Silicon Design Engineer

_ SMTS SILICON DESIGN ENGINEER THE ROLE: The ideal candidate will get to work on Verification of complex Analog Mixed...: Verification of IP features : Feature Test plan creation, Verification of the IP in RTL, Gatesim and Analog Mixed Signal...

Posted Date: 17 Jan 2025

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team... of Server SOC and is responsible for delivering the physical design of tiles to meet challenging goals for frequency, power...

Posted Date: 15 Jan 2025

Senior ASIC Design Engineer - PCIE

, memories, I/Os) into the SOC. You will work closely with System Architects, SoC architects, IP developers and physical design... of Echo devices is looking for a Senior ASIC Design Engineer to continue to innovate on behalf of our customers. We are a part...

Company: Amazon
Posted Date: 15 Jan 2025

Memory Design Engineer - SRAM and ROM

Title: Memory Design Engineer - SRAM and ROM About GlobalFoundries GlobalFoundries is a leading full-service.... For more information, visit . Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the...

Posted Date: 15 Jan 2025

Design-for-Testability Engineer

design, verification, test patterns generation, chip bring-up and more. As a DFT Engineer, you will impact and see the device...DESCRIPTION The team that built the innovative Silicon IP AZ1 Neural Edge that is powering the latest generation...

Company: Amazon
Posted Date: 15 Jan 2025

SMTS Silicon Design Engineer

_ SMTS SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer..., complex processor architecture, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 12 Jan 2025

SMTS Silicon Design Engineer

_ SMTS SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer..., complex processor architecture, digital design, and verification in general. You are a team player who has excellent...

Posted Date: 12 Jan 2025

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER SOC PD - Front End Integration (FEINT) Lead THE ROLE: The scoping of SOC PD FEINT (Front... in STA, constraints, timing signoff and physical design Power Analysis experience by PTPX Good at scripts, like Python/perl...

Posted Date: 12 Jan 2025

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion...

Posted Date: 10 Jan 2025

Sr. Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...

Posted Date: 10 Jan 2025

Sr. Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...

Posted Date: 09 Jan 2025

Senior MTS Analog Design Engineer

Job Description: Senior MTS Analog Design Responsibilities: Onsemi is seeking a Senior MTS Analog design Engineer... IP test plan and execution working along with product and test engineer. Define and manage IP quality standard...

Company: onsemi
Posted Date: 04 Jan 2025

Principal Analog Design Engineer

Job Description: Onsemi is seeking a Principal Analog design Engineer, NEW PRODUCT DEVELOPMENT, Power Management... to IP delivery Evaluate intermediate and results of projects during the design phase and during silicon evaluation...

Company: onsemi
Posted Date: 04 Jan 2025

MTS Silicon Design Engineer

_ MTS SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new... and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design. THE PERSON: You have a passion...

Posted Date: 28 Dec 2024

Standard Cell Layout Design Engineer

Title: Standard Cell Layout Design Engineer About GLOBALFOUNDRIES GLOBALFOUNDRIES is a leading full-service.... Job Responsibilities The development of product grade Standard Cell IP covering the following phases: Layout Design of Standard Cell...

Posted Date: 26 Dec 2024

SMTS Silicon Design Engineer ( Low power Verification Lead )

architecture, IP design/Verif , SOC Design, Physical Design teams, and product engineers to achieve first pass silicon success..._ SMTS SILICON DESIGN ENGINEER THE ROLE (Low power Verification): As a member of the S3 Group, you will help bring...

Posted Date: 25 Dec 2024

Memory Design Engineer - SRAM and ROM

. Introduction: GlobalFoundries is looking for highly motivated Memory Design Engineer to work in the Memory IP group in the Global... bit cells, physical layout design and verification. Sign off and release the memory IP’s on dedicated IP validation test...

Posted Date: 25 Dec 2024