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Keywords: Logic Design Methodology Engineer, Location: Bangalore, Karnataka

Page: 3

MTS Silicon Design Engineer ( SOC PD Front End Integration (FEINT) Lead )

Synthesis, Logic Equivalence, low power check, Timing Closure and full-chip SDC (constraints) generation. AMD design is big... Implementation Knowledgeable in all aspects of ASIC design flow Familiar with FEINT EDA tools Good leadership skills Good...

Posted Date: 16 Jan 2025

Staff Engineer- Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Senior Staff Engineer-Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Senior Staff Engineer-Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Staff Engineer- Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Staff Engineer-Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Senior Staff Engineer- Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... chips as well as the methodology to enable an efficient and robust design process. You will be responsible for maintaining...

Company: Marvell
Posted Date: 11 Jan 2025

Senior Staff Engineer - Physical Design

in refining the methodology to enable an efficient and robust design process working closely with the methodology team... design at block/partition/full-chip level. You will play a crucial role in developing and implementing timing and logic ECOs...

Company: Marvell
Posted Date: 05 Jan 2025

MTS Systems Design Eng

_ MTS SYSTEMS DESIGN ENGINEER THE ROLE: We are looking for a dynamic, energetic Lead / Principal Systems Design Engineer... AMD’s abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering...

Posted Date: 19 Feb 2025

Senior STA Engineer

. Collaborates with architecture, clocking design, and logic design teams to deliver flow development for chip integration... Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers...

Company: Intel
Posted Date: 21 Feb 2025

Digital Bench Characterization Engineer, Senior

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... BDC Post Silicon Engineering group has an opening for a Digital Bench characterization Engineer. This group develops Test...

Company: Qualcomm
Posted Date: 20 Feb 2025

Senior ASIC Engineer - DFT, OPD Hardware

. Make history. At Amazon, DFT (Design-for-Testability) is a multi-faceted job that involves architecture definition, logic... of Echo devices is looking for a Senior DFT Engineer to continue to innovate on behalf of our customers. We are a part...

Company: Amazon
Posted Date: 19 Feb 2025

ASIC Engineer, Front-End Implementation

, synthesis to build efficient System on Chip (SoC) and IP for data center applications. ASIC Engineer, Front-End Implementation... Responsibilities Run Logic/Physical Synthesis using advanced optimization techniques and generate optimized Gate Level Netlist...

Company: Meta
Posted Date: 14 Feb 2025

CPU STA/Timing Analysis Engineer (All Levels)

Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical.... As a Physical Design Timing Engineer, you will work with microarchitecture, RTL design, CAD, block level and top level physical...

Company: Qualcomm
Posted Date: 13 Feb 2025

Sr Verification Engineer

Engineer, you will define verification methodology and implement the corresponding verification plan for the SoC...Job Description: Overview UVM Based verificaton at SOC level Responsibilities As a Senior Design Verification...

Company: Prodapt
Posted Date: 10 Feb 2025

Sr Verification Engineer

Overview: UVM Based verificaton at SOC level Responsibilities: As a Senior Design Verification Engineer..., you will define verification methodology and implement the corresponding verification plan for the SoC. You will participate in the...

Company: Prodapt
Posted Date: 06 Feb 2025

CPU Synthesis CAD Engineer

design teams, and provide methodology guidance, tools/flows support and help achieve class-leading PPA. Work with EDA.... As CPU Synthesis CAD engineer, you will build and support the world’s best front-end implementation tools and flows...

Company: Qualcomm
Posted Date: 06 Feb 2025

Lead Software Engineer

. Join our dynamic team and make your mark on the payments technology landscape of tomorrow. The Lead Software Engineer at TSYS B2B...-on Lead Software Engineer who can able to take up the development of challenging features. If this sounds like you, let...

Posted Date: 01 Feb 2025

Senior Engineer

technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets. Senior Engineer... This individual is responsible for preparing the server-side logic of a web application, developing the application's back-end...

Company: Thales
Posted Date: 04 Jan 2025

DFT Engineer

Solid Analytical and Problem-Solving skills. Good understanding and Exposure to Logic design, Architecture & Verification... and see how you can make a lasting impact on the world! Design-for-Test Engineering at NVIDIA works on groundbreaking innovations...

Company: Nvidia
Posted Date: 21 Feb 2025