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Keywords: Memory IO DFT Architect & Silicon Validation Lead, Location: Boxborough, MA

Page: 1

Memory IO DFT Architect

_ THE ROLE: The Memory IO team is looking for a passionate and experienced PHY DFT Architecture & System/Silicon... Validation Lead for the development of high-speed LPDDR, DDR and inter-chip IO IPs. Be a part of the definition, design...

Posted Date: 14 Nov 2024