power • FE synthesis with DFT insertion • ASIC design flow and netlist flow checks - CDC, Logical Equivalence • UPF flow... for power islands as well as voltage islands • Familiarity with DFT and backend related methodology and tools...
, Logical Equivalence, ECO, etc. - Work closely on methodology improvements for improving synthesis QOR. - Work on Low power... integration, synthesis, UPF, timing analysis, and closure. Worked closely on improving low-power synthesis methodologies. Hands...