is responsible for development of range of mixed signal IPs that support Marvell’s success in Datacenter, Networking, Automotive... integration. Drive design reviews to ensure highly reliable automotive IP development. Provide guidance and mentorship to junior...
DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design... from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes...
-speed mixed-signal IP designs (PCIe, USB, MIPI, CXL, C2C, D2D, DDR, PLL, DAC, ADC, Sensors, etc.) for exciting products... and develop the testbench using advanced verification methodology such as SystemVerilog/UVM, Analog/mixed signal simulation, Low...
DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design... Engineering • Demonstrated experience with multiple CAD flows: analog and mixed-signal simulations, backend custom designs...
DFT Floorplan Clocks P&R STA Extraction Physical Verificatione. Knowledge in Soft / Hard / Mixed Signal IP Design... from senior engineers Ensure quality delivery as approved by the senior engineer or project lead Measures of Outcomes...