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Keywords: Serdes Analog Mixed Signal Design Engineer, Location: Santa Clara, CA

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Principal Analog Mixed Signal IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... and freedom to dive deep into the details of your specialization on most projects. What You Can Expect Seeking a Mixed Signal...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 26 Mar 2025
Salary: $165630 - 248100 per year

Analog Mixed-Signal Design Engineer

Design, develop, and characterize embedded analog circuits, such as high speed I/O, SerDes, FIFO, CDR, PLL..., etc. Design and debug RTL level signal synchronization, clock tree and conduct cross domain clock designs. Work closely...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 05 Apr 2025
Salary: $151091 - 155000 per year

Senior Mixed-Signal Design Verification Engineer

experience in CMOS Analog / Mixed Signal Circuit Design Skilled using design and verification tools (Cadence's IC design... Be responsible for verification of the Mixed Signal CMOS circuit design, architecture, golden models using advanced verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 05 Apr 2025

Senior Mixed Signal Design Validation Engineer

in the world. Join us at the forefront of technological advancement. As a member of our Mixed Signal Design Validation team... analog, digital, and mixed-signal circuits Ability to write scripts for validation, debugging, data analysis...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior Mixed Design Validation Systems - Electrical/Optical Engineer

in the world. Join us at the forefront of technological advancement. As a member of our Mixed Signal Design Validation team... of fundamental analog, digital and mixed signal circuits Experience with Python, Git, Matlab, and JMP Ability to code scripts...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 May 2025

Senior Analog Layout Engineer

. Are you ready to begin this exciting challenge? Key Responsibilities: Design and develop high-speed analog/mixed-signal blocks... is a plus! Specialize in analog/mixed-signal layout for SerDes, ADC/DAC, Ethernet PHYs, TIAs, and PLLs. Bachelor’s degree in Electrical...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 29 May 2025

Senior Analog Layout Engineer

efficiency. Are you ready to begin this exciting challenge? Your role Design and develop high-speed analog/mixed-signal...About the job you’re considering We are seeking a Senior Analog Layout Design Engineer with deep expertise...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 28 May 2025

Logic and Digital Circuit Design Engineer - New College Grad 2025

to join us today. As a member of our Mixed-Signal high-speed I/O SerDes group, you'll be working on NVDIA's latest ground breaking technology... understanding of Verilog or SystemVerilog, logic design and circuit modeling in RTL for mixed-signal blocks; Exposure to custom...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 May 2025

Senior Mask Design Engineer - Hardware

be doing: Performing physical layout for mixed-signal functions like PLL's, high speed SerDes, Analog to Digital converters..., to amplify human creativity and intelligence. We would love to hear from you! Are you looking for a Mask layout Design Engineer...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Apr 2025
Salary: $104000 - 195500 per year

Senior Mask Design Engineer - Hardware

high-speed mixed-signal circuit designs. What you'll be doing: Performing physical layout for mixed-signal functions... like PLL's, high speed SerDes, Analog to Digital converters, ESD structures designs in state-of-the-art sub-micron CMOS...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Apr 2025

Memory PHY RTL Design Engineer

Strong understanding of computer organization/architecture. Mixed signal RTL, Low power design experience is a plus Exposure..._ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware...

Posted Date: 31 Mar 2025

Senior Staff Post-Silicon Validation Engineer

in electrical engineering field, particularly in analog and mixed-signal design. Experience in high speed SERDES electrical... your knowledge in analog/mixed signal design during post-silicon validation, with a focus on electrical characterization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 17 May 2025
Salary: $121400 - 181800 per year