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Keywords: Serdes Analog Mixed Signal Design Engineer, Location: Santa Clara, CA

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Serdes Analog Mixed Signal Design Engineer

Title: Analog Design Engineer - High-Speed SerDes Location: San Jose, California Meta Description: Nexus... transceivers. Design high-speed analog and mixed-signal circuits for the future of data centers and AI. Competitive salary...

Posted Date: 31 Dec 2024
Salary: $145000 - 220000 per year

Principal Analog Mixed Signal IC Design Engineer

in an exciting career opportunity. What You Can Expect As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key...-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $144180 - 216000 per year

Senior Staff Analog Mixed Signal IC Design Engineer

in an exciting career opportunity. What You Can Expect As an Analog/Mixed-Signal IC Design Engineer, you will be part of a key...-on experience in designing mixed signal circuits including ADCs, DACs, RX, TX, PLLs, Filters, Bandgap bias circuits, regulators...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $128160 - 192000 per year

Senior Staff Engineer, Analog IC Design

will be working on analog design for high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm, 2nm... and beyond. Participate in SerDes Architecture Development with DSP, Analog and Digital design teams. Provide the instructions to the layout...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 14 Nov 2024
Salary: $128160 - 192000 per year

Senior Staff Engineer, Analog IC Design

will be working on analog design for high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm, 2nm... and beyond. Participate in SerDes Architecture Development with DSP, Analog and Digital design teams. Provides instructions to the layout...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 14 Nov 2024
Salary: $128160 - 192000 per year

Analog IC Design Engineer, Senior Staff Engineer

provides leading-edge SerDes and Chiplet IO PHY solutions and other Analog Mixed-Signal IPs to support all Marvell products... a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $128160 - 192000 per year

Memory RTL Design Engineer

_ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware... PHY link layer design, implementation & verification with Analog and System architect. PHY Analog/Digital co-design...

Posted Date: 18 Dec 2024

Principal Applications Engineer

a highly skilled and experienced Principal Applications Engineer specializing in SerDes IP DSP algorithms and mixed-signal... of relevant experience in SerDes IP, DSP algorithm development, and mixed-signal circuit design. Technical Skills...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2024
Salary: $137510 - 206000 per year

Electrical Engineer IV - (E4)

, QSFP, Aurora, etc.) Hands-on experience with analog mixed-signal (AMS) circuit development from definition to high-volume...Key Responsibilities Architecting and designing high-speed mixed-signal circuits and realize first-time-right...

Location: Santa Clara, CA
Posted Date: 16 Jan 2025