, and mixed-signal/analog circuitry. Staff Level, Digital Design Engineer for Mixed Signal Development (R244339) Key... Responsibilities: Design and verify digital IP within mixed-signal IP environments at block and chip level Work with digital back...
Role We are looking for a highly skilled and motivated Staff Digital DV Engineer to join SVV as the lead for Digital DV... and (sub)system-level verification in digital, DMS, and AMS domains. Develop and support in-house UVM Verification IP (VIP...