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Keywords: ASIC Design Engineer - Design & Timing Constraints, Location: San Jose, CA

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ASIC Design Engineer - Design & Timing Constraints

/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups... to understand chip architecture and guide them in refining design and timing constraints for seamless physical design closure...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 24 Apr 2025

STA Design Engineer (Static Timing Analysis)

_ THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring... in both flat/hierarchical flows. Experience with analyzing the timing reports and identifying both the design and constraints...

Posted Date: 19 Apr 2025

ASIC Design Engineer, Senior Technical Leader

You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock... teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 20 Feb 2025

Senior ASIC Design Engineer

design bugs and close code coverage. Work closely with the physical design team to close design timing and place-and-route... with 7+ years of ASIC design experience or Master's Degree in Electrical or Computer Engineering with 4+ years of ASIC design...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 07 Mar 2025

Senior ASIC Design Engineer

and close code coverage. Work closely with the physical design team to close design timing and place-and-route issues... of ASIC design experience or Master's Degree in Electrical or Computer Engineering with 4+ years of ASIC design experience...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 31 Jan 2025

ASIC Engineering Technical Leader - SDC

You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock... teams to understand chip architecture and guide them in refining design and timing constraints for seamless physical design...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 02 Apr 2025

Senior Principal Design Engineer

. We are a great and passionate engineering team building the next Palladium Emulation ASIC and system at Cadence Design System... Will be responsible for developing and debugging design constraints across all modes and level of hierarchies (block / subChip / top) The...

Posted Date: 17 Apr 2025

R&D Engineer Physical Design

timing constraints to ensure accurate and efficient timing analysis and closure. Expertise in place-and-route tools for ASIC...Broadcom is looking for a Design Implementation Engineer with demonstrated expertise across key areas such as synthesis...

Company: Broadcom
Location: San Jose, CA
Posted Date: 01 Mar 2025
Salary: $119000 - 190000 per year

IC Design Engineer

. logic synthesis, physical implementation constraints, static timing analysis. 5). Work directly with the physical... and excellent academic standing. 2). Must have in-depth knowledge of IC technology, ASIC design flows, EDA tools and Physical...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Apr 2025

CAD Engineer

and support P&R tools (e.g., Innovus, Fusion Compiler), optimize settings, constraints, and flows for performance, timing closure... Engineering, or a related field. 7+ years of experience in CAD support, ASIC design, or related roles with a focus on Place...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 22 Apr 2025

DFT Engineer

Principle DFT Engineer Broadcom's ASIC Product Division is seeking candidates for a DFT position at our Fort Collins.... The candidate would be required to work on various phases of SoC DFT related activities for Broadcom APD (ASIC Products...

Company: Broadcom
Location: San Jose, CA
Posted Date: 15 Mar 2025

Staff R&D Engineer Adv Tech Dev

for IP & ASIC to create robust designs in line with advanced semiconductor and packaging process flows & constraints Work... closely with technology experts and Silicon manufacturing teams to deploy the technology requirements for ASIC product design...

Company: Broadcom
Location: San Jose, CA
Posted Date: 12 Apr 2025
Salary: $119000 - 190000 per year