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Keywords: ASIC Design Verification Engineer, Location: Ontario

Page: 2

Staff Digital Design Engineer

will be assisting in chip design, verification, supporting back-end teams and timing closure. What You Can Expect Participate... in various aspects of chip design RTL development, synthesis, static timing analysis, formal equivalence, RTL lint, cross clock...

Company: Marvell
Location: Ottawa, ON
Posted Date: 17 Jan 2025

Principal Digital Design Engineer

will be assisting in chip design, verification, supporting back-end teams and timing closure. What You Can Expect High speed data... analysis, formal equivalence, RTL lint, cross clock domain (CDC) analysis and functional verification. Develop ASIC...

Company: Marvell
Location: Ottawa, ON
Posted Date: 03 Nov 2024

Engineer - DSP

communication Contributing in design, simulation, and verification of DSP block in optical modem Close cooperation with offline...Huawei Canada has an immediate 12-month contract opening for an Engineer. About the Team: Huawei Canada's Advanced...

Company: Huawei
Location: Ottawa, ON
Posted Date: 08 Jan 2025

Principal Module Advanced Development RF Engineer

Development RF Engineer is responsible for detailed signal integrity design, modeling and testing of high-speed electrical... interconnections. The successful candidate will work with PIC, ASIC, TROSA design and other cross functional teams to develop Infinera...

Company: Infinera
Location: Ottawa, ON
Posted Date: 20 Dec 2024

Analog Mixed-Signal Modelling Engineer

Expect As ASIC design engineer you will be responsible for the design, verification, and evaluation of digital circuits... requirements, RTL design, verification, synthesis, static timing analysis. Enhance design methodology and workflow for greater...

Company: Marvell
Location: Toronto, ON
Posted Date: 30 Nov 2024

Senior DSP Engineer

with proven experience in the design, implementation, and verification of digital signal processing algorithms for ASIC or FPGA...: Reporting to Director, ASIC Engineering, as a Senior DSP Engineer, you will be a member of the Signal Processing Team involved...

Company: Ciena
Location: Ottawa, ON
Posted Date: 24 Nov 2024
Salary: $100900 - 161100 per year

Timing Engineer, Senior Staff

Expect As ASIC Timing Engineer you will be responsible for post RTL design flow. You will be responsible for block... and beyond. Knowledgeable in Design-for-Test (DFT) generation and verification. Strong Perl and Tcl scripting skills. Experience in low-power...

Company: Marvell
Location: Toronto, ON
Posted Date: 15 Nov 2024

Principal Silicon Photonics Engineer

for design, verification, and validation of these integrated high speed optical components. The team performs system level... integrated component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell...

Company: Marvell
Location: Ottawa, ON
Posted Date: 08 Nov 2024

Analog Mixed-Signal Modelling Engineer (PHY + SerDes + Logic Timing)

Expect ASIC design engineer responsible the development of behavior models of high-performance SerDes analog circuits... representations of analog schematics. Document modeling and verification results for formal review. Improve analog modelling design...

Company: Marvell
Location: Toronto, ON
Posted Date: 08 Nov 2024

Display System Modeling Engineer

ASIC verification environment Collaborate with SoC architects, display hardware and software teams to evaluate new.... Strong presentation and communication skills. Preferred Qualifications: Understanding of ASIC/VLSI concepts ASIC design...

Company: Qualcomm
Location: Markham, ON
Posted Date: 16 Jan 2025

Sr. Software Development Engineer - Contract

across the company. KEY RESPONSIBILITIES: The design and verification of diagnostics tests that are used in ASIC... to drive memory traffic and maximize bandwidth and stress. We understand the features that go into the HW design...

Posted Date: 10 Nov 2024