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Keywords: ASIC STA Engineer, Location: San Jose, CA

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Senior ASIC STA Engineer

. Your role may include extraction and STA flow development, convergence strategies, and correlation between PNR, Spice, and STA... to streamline STA work, resolve design and flow issues, and drive execution to ensure progress and accuracy. Experience...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 25 Jan 2025

ASIC Design Technical Leader - Design & Timing Constraints Focus

networks. Cisco's silicon team provides a unique experience for ASIC engineers by combining the resources offered by a large..., and philanthropy), with the startup culture and breadth of growth opportunities that working in a smaller ASIC team can provide...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 12 Dec 2024

Principal Digital SOC Engineer

using industry standard tools Ability to synthesize and perform STA with industry standard tools either for ASIC or FPGA...Responsibilities: MaxLinear is seeking a Principal Digital SOC Engineer to join our Analog Mixed Signal (AMS) Design...

Company: MaxLinear
Location: San Jose, CA
Posted Date: 20 Jan 2025
Salary: $134300 - 208495 per year

Lead Application Engineer SCBU

with EDA tools on layout, STA, Extraction-SPEF/DSPF, Spice, IC/ASIC design flow experience from RTL to GDSII, custom circuit... The Lead Application Engineer leads the deployment and support of software products and supporting systems. In this role...

Company: Ansys
Posted Date: 17 Jan 2025

COPD (Customer Owned Physical Design) Engineer

Technical Lead for Physical Designs Are you a versatile, senior engineer capable of leading external and internal... cross-functional teams? Do your colleagues recognize you as a resident expert in areas such as physical design, STA, DFT...

Company: Broadcom
Location: San Jose, CA
Posted Date: 29 Nov 2024

HBM/DDR/SERDES DFT Verification Lead Engineer

Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position... at our San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer...

Company: Broadcom
Location: San Jose, CA
Posted Date: 21 Nov 2024
Salary: $107000 - 190000 per year

DFT Engineer

Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position... at our San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer...

Company: Broadcom
Location: San Jose, CA
Posted Date: 20 Nov 2024
Salary: $119000 - 190000 per year

Test Timing Engineer

Engineer with strong analytical skills and a deep understanding of timing constraints, such as clock groups, various exceptions... check, and SDC flow development. STA runs, more specifically at scan modes along with advising the Physical Design team...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 08 Nov 2024

HBM/DDR/SERDES DFT Verification Lead Engineer

Broadcom's ASIC Product Division is seeking candidates for HBM/DDR/SERDES Verification Lead Engineer position... at our San Jose, California Development Center. We are seeking a highly skilled HBM and SerDes DFT Verification Engineer...

Company: Broadcom
Location: San Jose, CA
Posted Date: 08 Nov 2024
Salary: $107000 - 190000 per year

Digital Design Engineer

Broadcom ASIC product division is a leader in semiconductor innovation, delivering cutting-edge custom silicon...-architecture design and PPA trade-offs. Experience in synthesis, STA, and timing closure using tools like Synopsys DC or Cadence...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Dec 2024
Salary: $119000 - 190000 per year

Design Engineer Architect/Lead

constraints with the customer and interface with the physical design team to aid in overall closure and manufacture of the ASIC... should have a strong understanding of VLSI and ASIC physical design 12+ years of experience w/ a deep understanding of ASIC architecture, design...

Company: Broadcom
Location: San Jose, CA
Posted Date: 23 Nov 2024