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Keywords: ASIC Timing and Methodology Engineer, Location: San Diego, CA

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ASIC Timing and Methodology Engineer

Engineering General Summary: As a Timing Engineer, you will play a vital role in Timing analysis targeting the Mobile, Compute.... You will facilitate and drive STA methodology for Qualcomm using PT-SI, Tempus and best in class timing ECO tools . Work on timing sign...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 15 Jan 2025

Timing and Technology Engineer

’s. Hands on contribution for STA timing sign off. A timing Engineer should be able to understand all kind of intricate timing...). You will be working with physical design team (and other teams) on timing closure, CAD teams, IP teams and Design Technology Teams...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 04 Feb 2025

Senior Principal Engineer Digital ASIC Design/Manager

right thing as a human being,” and we try to use that in our decision-making constantly. Senior Principal Engineer Digital... ASIC Design (RFIC5395) Exempt: Yes Responsible for architecture of digital design. Plan and implement digital...

Company: Kyocera
Location: San Diego, CA
Posted Date: 02 Mar 2025

Next-Gen, High-Speed Memory Subsystem ASIC Digital Design Engineer

Design Team is looking for ASIC Design Engineers for the next generation high speed LPDDR/DDR memory subsystems.. The front... engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT products. The candidate will work...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 20 Feb 2025

Sr. ASIC Implementation Engineer, DBF Silicon

ASIC design and DFT teams to understand the design and create timing constraints. Check the RTL design for clean synthesis... with the P&R team to ensure that they achieve the best PPA for all blocks. Lead the timing sign-off for the post P&R database...

Company: Amazon
Location: San Diego, CA
Posted Date: 19 Mar 2025
Salary: $143300 per year

Radio Integration Engineer

Qualifications This position requires detailed knowledge of the ASIC design flow, synthesis, static timing analysis, scripting.... Description As a Radio Integration Engineer, you will work in a team developing Wireless SoCs with custom hardware accelerators, as well...

Company: Apple
Location: San Diego, CA
Posted Date: 11 Apr 2025

Memory Control Design Engineer

for all. QCT Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers... engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT products. The candidate will work...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 05 Mar 2025
Salary: $115600 - 173400 per year

VLSI Design Engineer for Server / Data Center Products

is looking for bright ASIC engineers with excellent analytical and technical skills. Besides solid ASIC and/or FPGA design experience... team responsible for RTL Design, flows and methodology for high performance ASICs in the latest process nodes for High...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 14 Feb 2025