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Keywords: CPU Physical Design Clock Engineer, Location: Austin, TX

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CPU Physical Design Clock Engineer

Engineering General Summary: As a Physical Design Clock Engineer, you will work with microarchitecture, RTL design, CAD, block... level and top level physical design teams to create best in class clocking solutions for next generation CPUs...

Company: Qualcomm
Location: Austin, TX
Posted Date: 16 Feb 2025

Physical Design Methodology Engineer for High Performance / Low Power Designs

of our AMD physical design central methodology team, you can help define timing, power, and clocking methodologies..., you will have the opportunity to work across multiple divisions to drive physical design methodology optimizations across the entire...

Location: Austin, TX
Posted Date: 25 Dec 2024

MBIST Engineer (DFT)

, clock design, memory load/dump debug interface, Power on MBIST self-test, among others. You close on the spec..., with working knowledge of Physical Design. Exposure to advanced approaches such as hierarchical DFT. Strong post-silicon...

Company: 삼성전자
Location: Austin, TX
Posted Date: 24 Jan 2025

DFx Engineer

SOC-level interface, clock design, and support of various test/debug modes. You close on the spec with stakeholders... as they pertain to bleeding-edge process nodes. Strong familiarity with RTL coding & STA with working knowledge of Physical Design...

Company: 삼성전자
Location: Austin, TX
Posted Date: 24 Jan 2025

Graphics FE Integration Engineer

parameters, physical constraints, DFT logic and power intent. Description Description As a GPU Design Integration Engineer... (UPF/CPF), CDC, RDC, synthesis, physical design and STA. Experience with RTL analysis and/or PPA optimization using Invio...

Company: Apple
Location: Austin, TX
Posted Date: 16 Jan 2025