_ MTS SILICON DESIGN ENGINEER THE ROLE: The candidate will get to work on the Verification of complex PLLs... and ready to take on problems. KEY RESPONSIBILITIES: Verification of IP features : Feature Test plan creation, Verification...
. Job Description: Join Qualcomm's design verification team in verifying the high-speed mixed-signal IP designs (PCIe, USB, MIPI, CXL, C2C, D2D, DDR...). Experience with mixed-signal IP design verification, such as USB, PCIe, CXL, C2C, D2D, MIPI, UFS, DDR, PLL, Data Convertors (DAC...
reviews and ensure compliance with quality standards and design rules Help with releasing I/O IP libraries. Keep abreast... IO, High-speed IOs: DDR, USB, LVDS Have high level proficiency/knowledge of industry standard EDA tools Proficiency in PDK...
technologies, GAA ,FINFET and FDSOI technology Hands-on layout experience in GPIO, NAND IO, High-speed IOs: DDR, USB, LVDS... and motivated Senior Staff IO Layout Engineer to join our Central Engineering, Foundational IP team. This team contributes to the...