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Keywords: Functional Verification Engineer - IP, Location: Bangalore, Karnataka

Page: 7

Sr. Silicon Design Engineer

_ SENIOR SILICON DESIGN ENGINEER THE ROLE: We are looking for an adaptive, self-motivative design verification engineer..., maintain and enhance test environment/regression, and testbench. Work on IP/block testing and debugging Work on functional...

Posted Date: 09 Jan 2025

STAFF R&D/PRODUCT DVL ENGINEER

computers. Provide customer innovation solutions as well as manage the engineer documents following TE system procedure.... RESPONSIBILITIES Collaborate with cross-functional teams to design, develop, and launch new power connector and cable assembly...

Posted Date: 08 Jan 2025

VLSI Engineer - L3

. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the... module or the IP and create verification environment and the development plan as per Universal Verification Methodology b...

Company: Wipro
Posted Date: 04 Apr 2025

Graphics System Software Engineer

, maintain simulation models for discrete graphics solutions and debug and validate SW/FW IP level and full platform simulation...-Silicon Validation Experience with IP level validation (Verilog, UVM) Good knowledge of the Intel architecture platforms...

Company: Intel
Posted Date: 30 Mar 2025

VLSI Engineer

various functionalities, architecture, layout and implementation for a client ͏ Do 1. Conduct verification of the module.../ IP functionality and provide customer support a. Understand the architecture of the module or the IP and create...

Company: Wipro
Posted Date: 29 Mar 2025

VLSI Engineer - L3

. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the... module or the IP and create verification environment and the development plan as per Universal Verification Methodology b...

Company: Wipro
Posted Date: 27 Mar 2025

Senior Design Engineer

for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs... correctness of features. Supports SoC customers to ensure high-quality integration and verification of the IP block. Drives...

Company: Intel
Posted Date: 27 Mar 2025

DFT Engineer

-architecture. SoC IP DFT design integration or verification. EDA tools such as ATPG tools, Mentor Tessent shell, VCS simulation...Job Details: Job Description: The Graphics hardware IP team , within the CGAI Client Compute Group...

Company: Intel
Posted Date: 26 Mar 2025

SOC Design Engineer/Lead

for a CPU required to generate cell libraries, functional units, and the AI SOC / CPU IP block for integration in full chip..., performance, area, and timing goals as well as design integrity for physical implementation. Reviews the verification plan...

Company: Intel
Posted Date: 24 Mar 2025

Principal Engineer, RTL ASIC Design

-functional teams, IP Vendors and customers Implement a specification using RTL coding techniques and best practices Work... verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip...

Company: Marvell
Posted Date: 23 Mar 2025

Connectivity Automation Development Engineer

in test execution. Develop and execute automated test scripts for functional, regression, performance, and integration..., collaborate with developers to resolve issues, and perform verification testing once fixes are applied. Write and maintain...

Company: Intel
Posted Date: 22 Mar 2025

Lead- EDA Tools Hardware Engineer

, Signoff Checks, Formal and Functional Verification, Integration Handoff, Design and RTL ( IP/SOC) Quality checks, Simulation... and formal verification, emulation, front end signoff, IP and SOC Quality checking and methodology that are critical to enabling...

Company: Intel
Posted Date: 21 Mar 2025

Senior Staff Engineer - DFT

implemented in all Marvell Switch products. The team owns DFX Strategy, DFX Architecture, DFX IP and SoC validation pre and post..., testability strategy, flow, implementation, verification, and post-silicon bring-up. Collaborate with DFT team members...

Company: Marvell
Posted Date: 19 Mar 2025

Staff Engineer - DFT

implemented in all Marvell Switch products. The team owns DFX Strategy, DFX Architecture, DFX IP and SoC validation pre and post..., testability strategy, flow, implementation, verification, and post-silicon bring-up. Collaborate with DFT team members...

Company: Marvell
Posted Date: 19 Mar 2025

VLSI Engineer - L2

. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the... module or the IP and create verification environment and the development plan as per Universal Verification Methodology b...

Company: Wipro
Posted Date: 15 Mar 2025

Principal Design Engineer

. Responsibilities Design Verification for interconnect IP Relevant experience in interconnect and subsystems is strongly preferred... Crafting verification plans and executing on those plans to verify highly complex and configurable designs. Responsible...

Posted Date: 14 Mar 2025

Experienced Logic Design Engineer

for an IP required to generate cell libraries, functional units, IP blocks, and subsystems for integration in full chip designs... correctness of features. Supports SoC customers to ensure highquality integration and verification of the IP block. Drives quality...

Company: Intel
Posted Date: 13 Mar 2025

Sr Specialist System Engineering - Security Engineer

, and QA & Test roles including cross-functional teams in the Chief Security Office and Operations to achieve best-in-class... of OWASP Application Security Verification Standards (ASVS) Understanding of security concepts such as software...

Company: AT&T
Posted Date: 11 Mar 2025

VLSI Engineer - L3

. Conduct verification of the module/ IP functionality and provide customer support a. Understand the architecture of the... module or the IP and create verification environment and the development plan as per Universal Verification Methodology b...

Company: Wipro
Posted Date: 09 Mar 2025

DFT Design Engineer - Foundry Team

planning, repair architectures, insertion, verification Analog and mixed signal IP testing architecture and verification... on cutting-edge technologies such as Foundation IP Design, Mobile SoCs, Storage Solutions, AI/ML, 5G/ 6G solutions, Neural...

Company: Samsung
Posted Date: 05 Mar 2025