Find your dream job now!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: Principal Engineer, RTL ASIC Design, Location: Bangalore, Karnataka

Page: 1

Principal Engineer, RTL ASIC Design

coding with System Verilog assertions Well-versed in all stages of the ASIC design flow (including specification..., from architecture and design all the way through layout, packaging, prototype validation and production ramp up. What You Can Expect...

Company: Marvell
Posted Date: 23 Mar 2025

CPU RTL Power Design -Sr Lead/Staff/Sr Staf/Principal Eng

understanding of CPU or ASIC low power design including expertise in active and Idle power optimization, RTL clock gating techniques... Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical...

Company: Qualcomm
Posted Date: 03 Feb 2025

Principal Digital Design Engineer

Job Description: Description: Responsibilities OnSemi is seeking a Senior Principal Digital design Engineer, NEW... progress and status Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis and CDC, P&R, UPF and system...

Company: onsemi
Posted Date: 25 Mar 2025

Sr. Principal Digital design engineer

Job Description: Responsibilities: OnSemi is seeking a Sr. Prin Digital design engineer, NEW PRODUCT DEVELOPMENT... candidate will design the digital design architecture, digital RTL, low power design, synthesis and timing analysis...

Company: onsemi
Posted Date: 08 Apr 2025

Senior Principal Engineer, IP Design

-end (preferably RTL Verilog and VHDL based) design and methodologies Self-driven and capable for independent work... cross function Design, Verification, Validation and supporting SW/FW teams. Own the complete design of one or more cutting...

Posted Date: 12 Apr 2025

Principal Physical Design Engineer

with the RTL design team to drive modifications that address congestion and timing issues. Collaboration with the frontend... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 20 Mar 2025

Principal Physical Design Engineer

role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Posted Date: 05 Mar 2025

Digital IC Design Principal Engineer

all quality criteria are met. Must be familiar with Digital IC design methodologies, understand all stages of ASIC design flows... experience. Experience with digital design microarchitecture development is a must. Design/RTL experience in Verilog or SV...

Company: Marvell
Posted Date: 18 Feb 2025

Principal DFT Engineer

, Architecture and ASIC/Mixed signal chip developments Solid understanding of RTL design, CDC, ASIC synthesis, timing analysis...Job Description: Description for Internal Candidates JD OnSemi is seeking a Principal Physical Design Engg, NEW...

Company: onsemi
Posted Date: 24 Mar 2025

Staff / Principal GPU Verification Engineer

flows. Familiarity with ASIC design methodologies, flows, and tools. Proficiency in planning, estimating, and tracking..., and report verification metrics to ensure closure. Provide verification-focused feedback during design specification discussions...

Posted Date: 28 Feb 2025