Responsibilities include but not limit to, cash collection and cash forecast, evaluate and maintain customer credit, close AR module in Oracle and prepare monthly journal entries, reconciliations and analysis related to account receivables....
Being part of modelling the performance of the NPU module and its data transaction throughput. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU. Understanding the mathematics of ...
Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power estimat...
You would be part of a dynamic digital SoC design team that develops state-of-the-art video processing, neural processing, advanced video analytics accelerators, and the entire Camera Processor SoC. You would be joining the team to explore,...
As design verification engineer, you would be part of a passionate verification team that is constantly pushing the limits – developing and deploying state-of-the-art verification methodologies in ever-increasing design complexities, from U...