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Keywords: SOC Full Chip Timing Engineer, Location: Bangalore, Karnataka

Page: 1

ASIC Design Engineer

full-chip and subsystem timing working with synthesis and static timing analysis teams. Experience with DFT tools for scan... of Echo devices is looking for a Senior SoC Integration Design Engineer to continue to innovate on behalf of our customers...

Company: Amazon
Posted Date: 30 Mar 2025

Lead Engineer - RTL Design, Front End

Title: Lead Engineer - RTL Design, Front End About GlobalFoundries GlobalFoundries is a leading full-service.... For more information, visit www.gf.com. Introduction: GlobalFoundries is looking for highly motivated Test Chip Architect...

Posted Date: 06 Mar 2025

ASIC Engineer, Physical Design

to build efficient System on Chip (SoC) and IP for data center applications. ASIC Engineer, Physical Design Responsibilities.... Programming/scripting skills: TCL, Python, Perl or Shell. Preferred Qualifications Experience in full chip floor planning...

Company: Meta
Posted Date: 03 Feb 2025

Principal Engineer, RTL ASIC Design

on Full Chip Integration of Complex SoC design. Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs... verification team on pre-silicon verification tasks such as reviewing the verification test plans, coverage analysis, full-chip...

Company: Marvell
Posted Date: 23 Mar 2025

Principal Engineer, Design Verification

and deliver on design verification of complex Intellectual Property (IP) or Subsystem or complete full chip (SoC) level features... implementation meets both architectural and micro-architectural intent for complex IPs and feature areas of subsystem and SoC...

Posted Date: 19 Mar 2025

Physical Design Engineer - Foundry Team

physical design and timing closure of complex blocks and full-chip designs. Experience in top level floor planning including... . * Expertise in block level and full-chip SDC clean up, Synthesis optimization , Low Power checking and logic equivalence checking...

Company: Samsung
Posted Date: 05 Mar 2025

Principal Engineer, RTL ASIC Design

on Full Chip Integration of Complex SoC design. Has worked on complex chips such as network processors, CPUs ,GPUs ,NOCs... analysis, full-chip simulation and emulation, performance and power analysis and debug Help develop and/or evaluate design...

Company: Marvell
Posted Date: 11 Feb 2025