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Keywords: STA Design Engineer (Static Timing Analysis), Location: San Jose, CA

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STA Design Engineer (Static Timing Analysis)

_ THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring... handoff for STA checks. collaborate with CAD on the development of pre-production synthesis (Design Compiler) and STA...

Posted Date: 19 Apr 2025

ASIC Design Engineer - Design & Timing Constraints

experience Experience with block/full chip SDC development in functional and test modes. Experience in Static Timing Analysis.../SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 24 Apr 2025

ASIC Design Engineer, Senior Technical Leader

You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock... Qualifications: Experience in Static Timing Analysis. Experience with constraint analyzer tools such as Fishtail/TCM (Timing...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 20 Feb 2025

ASIC Engineering Technical Leader - SDC

Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus. Experience with related digital design... You are a diligent Design/SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 02 Apr 2025