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Keywords: ASIC Timing Engineer, Location: Cupertino, CA

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ASIC Timing Engineer

chain-of-thought reasoning. ASIC Timing Engineer Etched is seeking an exceptional ASIC Timing Engineer... to join our innovative team. The candidate will be responsible for driving timing analysis and closure of our next-generation AI chips...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025
Salary: $2000 per month

ASIC Design Engineer - Neural Engine DMA

impact getting functional products to millions of customers quickly. Description Description As an ASIC Design Engineer... Knowledge of front-end ASIC RTL digital logic design using Verilog or System Verilog. Strong problems-solving skills using...

Company: Apple
Location: Cupertino, CA
Posted Date: 25 Jan 2025
Salary: $121900 - 183600 per year

ASIC Design Engineer - Pixel IP

experience in ASIC implementation, especially logic synthesis, static timing analysis, logic equivalence checking, and working... a critical impact getting functional products to millions of customers quickly. Description Description As an ASIC Design...

Company: Apple
Location: Cupertino, CA
Posted Date: 10 Jan 2025

ASIC Design Engineer - Neural Engine DMA

impact getting functional products to millions of customers quickly. Description Description As an ASIC Design Engineer... Experience in SoC front-end ASIC RTL digital logic design using Verilog or System Verilog. Experience working multi-functionally...

Company: Apple
Location: Cupertino, CA
Posted Date: 04 Jan 2025

Sr. Physical Design Engineer, Annapurna Labs

; we're handling massive scale and rapid integration of emergent technologies. We're looking for an ASIC Physical Design... Engineer to help us trail-blaze new technologies and architectures, while ensuring high design quality and making the right...

Company: Amazon
Location: Cupertino, CA
Posted Date: 26 Feb 2025
Salary: $143300 per year

Physical Design Engineer

chain-of-thought reasoning. Physical Design Engineer Etched is looking for exceptional PD engineers to join our team... Design flows to close blocks, support ASIC infrastructure, automate Physical Design flows, improve CAD infrastructure Drive...

Company: Etched
Location: Cupertino, CA
Posted Date: 20 Feb 2025
Salary: $2000 per month

RTL Design Engineer

chain-of-thought reasoning. RTL Design Engineer As an RTL Engineer at Etched, you will be critical in ensuring... and upcoming ASIC designs. In this role, you will work closely with state-of-the-art architectures for machine learning...

Company: Etched
Location: Cupertino, CA
Posted Date: 19 Feb 2025
Salary: $2000 per month

SoC Design/Integration & Synthesis Engineer

for a talented engineer to join our exciting team of problem solvers. Description Description As an SOC/ASIC Integration... & Synthesis Engineer, you will have responsibilities spanning various aspects of SOC design: - Drive all front-end integration...

Company: Apple
Location: Cupertino, CA
Posted Date: 19 Feb 2025

STA Engineer

and integration tasks for the high quality IP deliverables. Description Description As an ASIC STA Engineer... engineer to join our exciting team of problem solvers. Come join our team and be responsible for leading edge IP development...

Company: Apple
Location: Cupertino, CA
Posted Date: 08 Jan 2025