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Keywords: Memory RTL Design Engineer, Location: Santa Clara, CA

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Memory RTL Design Engineer

_ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware... development of high-speed LPDDR, DDR IPs. Be a part of the definition, design and development phase of industry-leading Memory...

Posted Date: 30 Jan 2025

Memory RTL Design Engineer

_ THE ROLE: The Memory PHY team is looking for a passionate and experienced Design Engineer for RTL and Firmware... development of high-speed LPDDR, DDR IPs. Be a part of the definition, design and development phase of industry-leading Memory...

Posted Date: 18 Dec 2024

Senior E/E & Semiconductor Engineer - Digital Design (RTL) Engineer

Job Role: RTL Engineer Job Location: Santa Clara CA Job description: We are seeking Digital Design (RTL) engineer... for our full time role with Capgemini Engineering. Minimum 10 years of strong experience in Digital design at RTL level using...

Company: Capgemini
Location: Santa Clara, CA
Posted Date: 29 Jan 2025

Digital Design (RTL) Engineer

Role: Digital Design (RTL) Engineer Location: Santa Clara, CA -Remote work option allowed... Job Description: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro...

Posted Date: 24 Jan 2025

Senior ASIC Design Engineer - Memory Controller

We are now looking for a Senior ASIC Design Engineer for Memory Controllers. As a Senior Designer at NVIDIA, you'll... join a group of hardworking engineers to design and implement innovative Memory Controllers for our GeForce GPUs and Tegra SoCs...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Jan 2025

Senior DFx Architect and RTL/Methodology Engineer

_ THE ROLE: Circuit Technology team is looking for a passionate and experienced DFT Methodology/Architect/RTL execution... Lead for the high-speed SERDES Phys, Next gen Memory Phys and Die-to-Die interconnect IPs. This opportunity includes...

Posted Date: 08 Jan 2025

Senior Memory Controller Verification Engineer

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia... or Verification experience of dynamic memory controllers (ddr{2, 3, 4, 5}, lpddr{2, 3,4,5, 6}) Exposure to design and verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 30 Jan 2025

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... platforms of tomorrow. What you'll be doing: As a member of our Memory Subsystem Design team, you will collaborate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Dec 2024

Senior ASIC Design Engineer

We are now looking for a Senior ASIC Design Engineer to join our System ASIC team! NVIDIA has continuously reinvented.... What you’ll be doing: Be an integral part of the System ASIC Design team to help develop and improve our RTL and SOC designs...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 12 Dec 2024

SoC Performance Architect

/ DRAM controller / IO blocks for server-class SoCs, correlate models against RTL behavior, prototype ideas and help... Engineering/Electrical Engineer with 3 years of experience in SoC performance/power modeling Strong grasp of the computer...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 23 Jan 2025